CPU Registers x86 - OSDev Wiki
Oct 12, 2021 · It permits the debugger to determine which debug conditions have occurred. Bits 0 through 3 indicates, when set, that it's associated breakpoint condition was met when a debug exception was generated. Bit 13 indicates that the next instruction in the instruction stream accesses one of the debug registers.
DA: 98 PA: 26 MOZ Rank: 54